updated boost on windows
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@@ -19,29 +19,12 @@
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#define BOOST_ATOMIC_DETAIL_CAPS_GCC_ARM_HPP_INCLUDED_
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#include <boost/atomic/detail/config.hpp>
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#include <boost/atomic/detail/hwcaps_gcc_arm.hpp>
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#ifdef BOOST_HAS_PRAGMA_ONCE
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#pragma once
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#endif
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#if !(defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6ZK__))
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// ARMv7 and later have dmb instruction
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_DMB 1
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#endif
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#if !(defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || defined(__ARM_ARCH_6Z__))
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// ARMv6k and ARMv7 have 8 and 16 ldrex/strex variants
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXB_STREXB 1
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXH_STREXH 1
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#if !(((defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6ZK__)) && defined(__thumb__)) || defined(__ARM_ARCH_7M__))
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// ARMv6k and ARMv7 except ARMv7-M have 64-bit ldrex/strex variants.
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// Unfortunately, GCC (at least 4.7.3 on Ubuntu) does not allocate register pairs properly when targeting ARMv6k Thumb,
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// which is required for ldrexd/strexd instructions, so we disable 64-bit support. When targeting ARMv6k ARM
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// or ARMv7 (both ARM and Thumb 2) it works as expected.
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXD_STREXD 1
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#endif
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#endif
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#define BOOST_ATOMIC_INT8_LOCK_FREE 2
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#define BOOST_ATOMIC_INT16_LOCK_FREE 2
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#define BOOST_ATOMIC_INT32_LOCK_FREE 2
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